3-phase IM DTC controller build

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Post by Stiive » Thu, 24 May 2012, 20:32

FYI: Here is a link to my thread on the DIY forum.
http://www.diyelectriccar.com/forums/sh ... 74151.html

Please feel free to throw in your 2c about what voltage sensor hardware I should use to get best speed/accuracy while maintaining isolation.
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Post by Stiive » Wed, 04 Jul 2012, 23:39

Hey guys,

I've had a problem recently with my SIMULINK simulation when changing from an ideal IGBT w/ Diode block to a more realistic IGBT and Diode.
Basically the problem occurs from it requiring me to have a snubber across each DC rail to phase. (i.e DC+ to phase U, and DC- to phase U). Something due to the IGBT/Diode being modeled as a current source.

At the moment because i wasn't planning to have a snubber here (Just DC+ to DC-), so i have modelled the capacitance as the series capacitance of collector-gate and gate-emitter (miller capacitance) in parallel with collector-emittor capacitance. But for any value of resistance I get massive error propagation in my integrators.

On the DIY forum a member referred me to this article (http://www.cde.com/tech/design.pdf) which shows a snubber which goes across DC+,phase and DC-, however it states this is only required for "higher current applications"

Anyone got some thoughts if this would be required in my case? Prob will design to switch upto about 600A. Personally i haven't seen this before in a VFD, but I have only dissected small industrial controllers (<10kW), and the very crappily designed MES-DEA TIM600.

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Post by BigMouse » Thu, 05 Jul 2012, 18:02

600A is very high current, so I would say yes. Having read through that paper myself before, that is the method that I am using on my controller. I'm using 600A 600V dual IGBTs and limiting the current to 450-500A. My snubbers will be PCB mounted with the bulk capacitors on the same board. The board will be mounted on top of the IGBT itself.

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Post by Stiive » Thu, 05 Jul 2012, 18:17

BigMouse wrote: 600A is very high current, so I would say yes. Having read through that paper myself before, that is the method that I am using on my controller. I'm using 600A 600V dual IGBTs and limiting the current to 450-500A. My snubbers will be PCB mounted with the bulk capacitors on the same board. The board will be mounted on top of the IGBT itself.


How much current you predict will be going through your caps/snubbers? Must have a decent amount of copper on the PCB? I'm guessing you don't have the bulk of your DC bus current running through the PCB though?

If you are using brick modules you can get snubbers that sit directly on the brick. I have some that fit my Fuji 2MBI600U2E, I guess you would need 2 units per phase to go between DC+ -> phase and phase -> DC-, or did you buy a snubber that incorporates all three terminals? OR perhaps you made your own?
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Post by BigMouse » Fri, 06 Jul 2012, 03:28

Snubber peak repetitive current will be around 250-300A (as a guess, based on ratings found for off-the-shelf snubbers).

I've spent mot of the day rethinking my snubber design, prompted by your question ;-)

The original plan was to use axially leaded snubber capacitors purchased from eBay. 3.3uF 630v, low inductance. The resistor and diode would be mounted on the board very close to the mounting holes for the IGBT terminals and joined with large copper pours and thickened traces (wire soldered along trace). The DC bus current flows through bus bars mounted directly to the IGBTs (laminated would be ideal, but it's DIY for now). The PCBs are mounted on top of the bus bars with short brass or copper spacers to ensure clearance between the through-hole leads on the bottom of the PCB and the top of the bus bar copper (which will also be wrapped in heatshrink).

I found this paper to be a bit more useful: www.irf.com/technical-info/designtp/tpap-5.pdf

The problem I still need to figure out is why all the calculations and simulations I'm doing say I need to very small (2ohm or so) resistor, but with insane (3kW!) power handling. With values like that, might as well drop the diode and resistor from the snubber and use a simple decoupler (contrary to the advice of the papers I've read).

It would be nice if they defined "High Current". 200A? 2000A?

When it comes down to it, I'll be running a maximum of around 400v on IGBTs rated to 600v. Decoupling capacitors would probably be sufficient. I'll have to watch the voltage of my DC bus with my scope next time I run the controller. It's got 1200v IGBTs in it at the moment, so they should be very safe.

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Post by Stiive » Fri, 06 Jul 2012, 04:58

BigMouse wrote:
The problem I still need to figure out is why all the calculations and simulations I'm doing say I need to very small (2ohm or so) resistor, but with insane (3kW!) power handling. With values like that, might as well drop the diode and resistor from the snubber and use a simple decoupler (contrary to the advice of the papers I've read).


What are the calcs and values your using?
BigMouse wrote:
It would be nice if they defined "High Current". 200A? 2000A?

When it comes down to it, I'll be running a maximum of around 400v on IGBTs rated to 600v. Decoupling capacitors would probably be sufficient. I'll have to watch the voltage of my DC bus with my scope next time I run the controller. It's got 1200v IGBTs in it at the moment, so they should be very safe.


Because your not doing vector control, if you bump your gate resistors up a bit you should be fine with just snubbers and decent decoupling cap across the DC bus. Decreasing the turn off time (increased turn off gate resistance) will reduce your inductive peak over-voltage. Decreasing the turn on time will decrease your FWD current.

Last edited by Stiive on Thu, 05 Jul 2012, 18:59, edited 1 time in total.
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Post by Johny » Fri, 06 Jul 2012, 15:36

If it helps, the only places I have seen designs for inverters using output snubbers are in inverters 400kW and above. Good DC decoupling is generally considered enough around 100kW.

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Post by Stiive » Fri, 06 Jul 2012, 16:06

The IGBTs I will be using are 540kVA (600V 900A)

Will be designing to about a 200kW output max, and probably actually using much less again - until i find a capable motor that is

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Post by BigMouse » Fri, 06 Jul 2012, 17:23

Stiive wrote:What are the calcs and values your using?
I'm using the equations at the bottom of page 5 of the paper I linked above.

I used:
12khz as fsw
363v (110*3.3) for Vcc
450v (rating of my bulk capacitors) for Vpk
450a as I0 (to leave plenty of current headroom, still 163kW. Plenty)
300nH as Ls (estimate based on inductance per meter of cable and values found on page 4 as a guide)

This results in
Cs = 8uF
Rsn = 1.7ohm
Pr = 3400W

Johny, thanks for the observation. Makes me feel a bit more confident about using simple decoupling.

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Post by Stiive » Fri, 17 Aug 2012, 06:27

Update just for the hell of it.

Making a small inverter based on the STM32F4DISCOVERY first to test my code before I get my hands on the larger bricks. The modularity of the demo board will be good i think incase i let the smoke out during debugging.

Image

Let's just hope it works. Got a $500 digikey order riding on this.
Just adding some final touches to the PCB, last minute footprint check, few more components to add, and I'll be in business! Hopefully the PCB off in the next couple of days and start perfecting the code.

The IGBTs are 650V 75A (150A peak), gonna remove the silkscreen over the VSI traces so i can clamp some milled copper to it to carry the current. I'll prob only be testing on my 2kW motor to start with anyway.
Also over-spec'd the gate drivers and made it modular so I can cut off the VSI stage if all goes well and test with some 600V600A Fuji bricks I have lying around.
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Post by BigMouse » Fri, 17 Aug 2012, 16:45

Stiive wrote:gonna remove the silkscreen over the VSI traces so i can clamp some milled copper to it to carry the current.


You can specify areas of the board where solder mask and silk-screen are left off. You'll end up with bare (tinned) copper, but it's exposed and easy to interface with. With eagle, the layer is called "cream". Not sure what PCB program you're using, but you should be able to just draw it on a new layer with polygons and specify that that layer specifies where there should be no solder mask. The manufacturer should be able to handle that.

When exporting the gerber, you could even combine that layer with the layer which shows the SMD component solder pads. It should have the same effect.

How're you doing gate drive?

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Post by Stiive » Fri, 17 Aug 2012, 16:58

Yeh that's what i meant, just haven't got around to doing it yet. I'd say there's still a few more hours worth of doing the final touches.
The whole board will be going in a reflow oven, so i think i might put paste on this area and half solder half clamp it before the rest of the components go on.

Gate drivers are on the front left of the board. Basically 3*3W isolated +-15V DC/DC converters for the upper gates, and a 15W supply for the bottom gates and some other power requirements. The gates are driven by FOD3184 opto gate drivers, no fancy hardware protection or built in dead-time on this version, got enough spares to hopefully get it working haha. The whole board is pretty basic, though theres a few things i added on just for the hell of it, prob should have just reduced the size but owel.


Hopefully i can get it finished today, its so closeee
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Post by BigMouse » Fri, 17 Aug 2012, 17:21

Yeah, I realised that's probably what you meant after I posted that ;-)

Be careful soldering copper bar to PCB. Different rates of heating/cooling can case warping and stress in the board. Use a very slow ramp rate for the cooling on your oven. You'll want everything to be the same temperature at the point the solder solidifies. There's still a long way to go after that though, so there's no avoiding some differential heating. Methods I've seen for PCB bus bars usually involve either heave solid copper wire jumpering holes along the board, or vertical bus bars which solder through holes at specific intervals.

Your power supplies are certainly beefy, and that's not a bad thing. At 3A, those optocouplers might be undersized by comparison though, if you're driving the gates directly from them.

Are you driving the gates with +15v for on, -15v for off? Either way, a 30v swing across the gate capacitance through a (lets say) 6ohm Rg is 5A. The smallest Rg you could get away with and stay under 3A would be 10ohm. That's a pretty big value and will hurt your switching times and increase switching losses/heating.

Consider adding an intermediate "power stage" for the gate drive if you don't have one already.

Forgive me if you've already taken these things in to account.
Stiive wrote: Yeh that's what i meant, just haven't got around to doing it yet. I'd say there's still a few more hours worth of doing the final touches.
The whole board will be going in a reflow oven, so i think i might put paste on this area and half solder half clamp it before the rest of the components go on.

Gate drivers are on the front left of the board. Basically 3*3W isolated +-15V DC/DC converters for the upper gates, and a 15W supply for the bottom gates and some other power requirements. The gates are driven by FOD3184 opto gate drivers, no fancy hardware protection or built in dead-time on this version, got enough spares to hopefully get it working haha. The whole board is pretty basic, though theres a few things i added on just for the hell of it, prob should have just reduced the size but owel.


Hopefully i can get it finished today, its so closeee

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Post by Stiive » Fri, 17 Aug 2012, 17:58

BigMouse wrote: Yeah, I realised that's probably what you meant after I posted that ;-)

Be careful soldering copper bar to PCB. Different rates of heating/cooling can case warping and stress in the board. Use a very slow ramp rate for the cooling on your oven. You'll want everything to be the same temperature at the point the solder solidifies. There's still a long way to go after that though, so there's no avoiding some differential heating. Methods I've seen for PCB bus bars usually involve either heave solid copper wire jumpering holes along the board, or vertical bus bars which solder through holes at specific intervals.

Yeh, i was originally going to use the vertical bars, but they wont fit under the IGBT/heatsink. If the paste method doesn't look like its going to work, i'll just clamp+conductive paste. I didnt really think of the stresses thing, thanks! I'm also going to run a wire back to DC+ and DC- cus even the copper plate wont get a good connection with the stupidly close-to-each-other and small legs of the IGBT. Lets hope the resultant current loops arn't too severe, The extra plate was more going to be for the caps on the underside that you cant see in the pic.

BigMouse wrote: Your power supplies are certainly beefy, and that's not a bad thing. At 3A, those optocouplers might be undersized by comparison though, if you're driving the gates directly from them.
Yeh ideally i would have liked a 5A version, but that's the highest current carrying opto driver Fairchild has (had?). Got a bunch of them free though so cant complain too loudly :P
BigMouse wrote:Are you driving the gates with +15v for on, -15v for off? Either way, a 30v swing across the gate capacitance through a (lets say) 6ohm Rg is 5A. The smallest Rg you could get away with and stay under 3A would be 10ohm. That's a pretty big value and will hurt your switching times and increase switching losses/heating.
I was thinking of starting off with 9ohm, the IGBTs im using are the Fairchild FGH75T65UPD. They are pretty quick at switching, even at 10ohm. I'm hoping once initial testing is complete I can push the boundaries of the FOD3184 and use 6/4.5/3.6/3ohm haha (my resistors are 18ohm each with space for upto 6 in parallel)


BigMouse wrote: Consider adding an intermediate "power stage" for the gate drive if you don't have one already.
Ideally i would have liked +15V -8V switching. I had considered a series resistance or LDO on the negative power before the FOD, but i put it off because i wasn't sure if it was a good thing. Haha thanks for reminding me, i guess this is my last chance ot add it in again. I think my thoughts at the time were "well if i blow all my gate drivers, ill try find a 5A+ version in the same package with same pin layout". Guess ill have to check such a chip exists before I rely on this Image.

Do you have any suggestions for an intermediate "power stage"?

BigMouse wrote:Forgive me if you've already taken these things in to account.
No, I appreciate your input. When there's so much going on, its easy to loose track of thought and forget things.
I haven't put a heap of thought into this controller as its just an interim (turned expensive) solution to get the code up to scratch, and to test some of the analogue circuitry. I will be using Semikron all-in-one gate driver modules on the next version.

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Post by Stiive » Fri, 17 Aug 2012, 19:35

Stiive wrote:I think my thoughts at the time were "well if i blow all my gate drivers, ill try find a 5A+ version in the same package with same pin layout". Guess ill have to check such a chip exists before I rely on this.


Dammit, no luck :(
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Post by BigMouse » Fri, 17 Aug 2012, 23:01

Stiive wrote:
BigMouse wrote: Consider adding an intermediate "power stage" for the gate drive if you don't have one already.
Ideally i would have liked +15V -8V switching. I had considered a series resistance or LDO on the negative power before the FOD, but i put it off because i wasn't sure if it was a good thing. Haha thanks for reminding me, i guess this is my last chance ot add it in again. I think my thoughts at the time were "well if i blow all my gate drivers, ill try find a 5A+ version in the same package with same pin layout". Guess ill have to check such a chip exists before I rely on this Image.

Do you have any suggestions for an intermediate "power stage"?
Powerex application note BG-2B has a good method of specifying the positive and negative voltage levels. It's shown on figure 2 of page 2 of the document. Basically, use your + and - outputs from your DC-DC (so 30v between them) and put a divider on the output. Resistor on top, zener on the bottom. The negative (turn-off) voltage will be whatever the zener voltage is, and the difference will be positive. To get +15 -8, you'd need a 23v output. A 10v zener in your case will give +20 -10. Not sure what the maximum gate voltage is for your IGBT, but make sure you stay under it. Are there 24v (+/-12v) versions of the DC-DC units you're using?

The intermediate power stage I'm using is just an NPN-PNP common-base totem pole. Same as what's in the output of the optocoupler, but higher rated.

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Post by Stiive » Sat, 18 Aug 2012, 00:39

BigMouse wrote: Basically, use your + and - outputs from your DC-DC (so 30v between them) and put a divider on the output. Resistor on top, zener on the bottom. The negative (turn-off) voltage will be whatever the zener voltage is, and the difference will be positive. To get +15 -8, you'd need a 23v output. A 10v zener in your case will give +20 -10.

Yeh i was thinking of using a +24V supply and make my own common at 9V, but for some reason i thought i'd need a 3A (50W) zener, gahh, realise my novice, rushed, mistake now.

Ahwel, have my +-15V supplys now, maybe i'll just add in one (or two) large diode forward voltage drops to reduce the negative voltage, and maybe a zener to clamp. I'll look into it tomorrow

OR, i could just leave it as is and go with 9ohm gate resistance as planned, I'm sure it'll be fine for testing.
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Post by zeva » Sat, 18 Aug 2012, 00:49

Another option is to replace your 4A isolated gate driver with a high-speed optocoupler like a 6N137 just to pass the PWM through, then use a regular high current gate driver IC like a MIC4452, which enables you to use a 1-2ohm gate resistance.

If my understanding is correct, the purpose of a -ve rail for the gate drive is to hasten turn-off times, but it comes at the expense of turn-on times because you need to increase your gate resistance to keep peak current inside your gate driver's rating (and your +ve rail hasn't changed w.r.t your gate threshold voltage).

The IGBT you mention has a 6V typical gate threshold voltage, so 0-15V gate drive won't give especially asymmetric rise/fall times. I think you'd be best served just getting the most gate current you can.

Of course, the faster your switching times, the worse any overshoot and ringing will be as a result of parasitic inductance, so the more important your physical layout and snubber design becomes.. So it's not such a bad idea to start with slower gate switching Image
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Post by Stiive » Sat, 18 Aug 2012, 02:31

zeva wrote: Another option is to replace your 4A isolated gate driver with a high-speed optocoupler like a 6N137 just to pass the PWM through, then use a regular high current gate driver IC like a MIC4452, which enables you to use a 1-2ohm gate resistance.

Yeh, didn't really explore this option because I have 15 FOD3184's sitting here. The purpose of this controller never was to drive any large IGBTs, but might as well think ahead, maybe i should look into this, i probably have enough room to have separate opto coupler and gate driver, though i think the propagation delay would increase in this method. Might look into this and keep everything else the same.
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Post by T2 » Sat, 18 Aug 2012, 13:39

I would like to raise something I find disturbing about the ECICaps whitepaper since no-one has brought it up.

Formula (29) delta V =Vbus/(32*L*C*f^2) is used to calculate the needed capacitance of a film cap capacitor bank without regard for the existing phase current. I had hoped someone would bring it up.

The issue is this. The authors assume that whenever the top transistor of a particular inverter leg connects a stator winding to the positive bus that the only variables that need be up for consideration are the inductance of the stator winding, the stator BEMF and the DC bus voltage.

Not true since the capacitor spike current will start building upwards beyond that initial value of phase current which, incidentally, is almost never zero amps particularly when the motor is running.
Their reasoning assumes that the value for the film cap need only be calculated with consideration for circuit elements involved in this filter circuit whose objective is purely to minimize bus voltage ripple.
However, I say, not just from the diminutive [Delta I = (Vbus-Bemf)/L * dt ]   part but also from the hefty chunk being pulled by the stator which they seem to ignore.

The superior current capability of film cap is deemed adequate for magnitudes of delta I current normally encountered in passive circuits with the values proposed. However this is not a passive circuit. by any stretch. In actuality, of course, the motor phase current - instantaneous value could be as high as 386 Amps in the Tritium Wavesculptor - flowing to that leg has just been commutated from the bottom diode of the leg, accordingly the initial current that hits the capacitor bank is not zero as the whitepaper would have us believe.

In fact I = Cdv/dt still applies for this current.

So dv = 386 * dt/C where C= 800 microfarads and dt = 50 musecs if f=10khz.
Worst case scenario = 24.1 volts of ripple

To which we must then add the effect of Equn (29) as before.

IOW I still think we need 5000 microfard across that bus despite the superiority of film caps if we want to achieve 4 volts of ripple.
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Post by coulomb » Sat, 18 Aug 2012, 14:25

T2 wrote: IOW I still think we need 5000 microfarad across that bus despite the superiority of film caps if we want to achieve 4 volts of ripple.

But T2, the phase current is current that was being supplied by the bottom transistor and/or diode, right? It's just being "commutated" from one IGBT/diode combination to the other. There will be short times when both or neither side are conducting, and the film capacitors need to absorb or supply that. But on any time-scale longer than that, the film capacitors don't have anything to do with it, as far as I know.

I'm no inverter design expert; I'm just basing this on observations of a 3-phase (non-motor) inverter that I work with.
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Post by Stiive » Mon, 20 Aug 2012, 20:50

zeva wrote: Another option is to replace your 4A isolated gate driver with a high-speed optocoupler like a 6N137 just to pass the PWM through, then use a regular high current gate driver IC like a MIC4452, which enables you to use a 1-2ohm gate resistance.



Okay, well after much searching this morning may have come up with a suitable combo. I only have -15V, 0V and +15V available (dont want to add more), so the opto coupler needed to be able to handle atleast 15V, and the gate driver needed 30V capability. I also wanted the total propagation and rise/fall time to be similar to just the FOD3184 on its own (<200ns).

Firstly, found a decent 14A driver capable of 35V, with decent propagation and rise/fall, and also capable of accepting 35V on the logic input.
http://www.clare.com/home/pdfs.nsf/0/18 ... XD_614.pdf


For the isolation, I only really could find 1 optocoupler upto the task:
http://www.vishay.com/docs/83684/sfh6720t.pdf
But a 300ns max propagation delay is pushing it. In order to get the speed i need, looks like i'll have to go with an isolated gate driver just to drive the bigger gate driver haha.

So looks like i'll end up with something like this
http://www.silabs.com/Support%20Documen ... 220-21.pdf
With a nice 60ns max propagation delay for $1.63

Alternative is something like ADuM3223, which itself is a 4A driver with 50ns delay at 2nF (rather than 200pF for the Si8220). But at $5.12 each they are an expensive alternative, esp cus i wont be using the 4A capability.
http://www.analog.com/static/imported-f ... 3_4223.pdf

Gahh, looks like i just added on another $30 onto this board. Will have to turn it into a wind turbine generator or something to get my moneys worth back.

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Post by BigMouse » Mon, 20 Aug 2012, 23:34

Stiive wrote:For the isolation, I only really could find 1 optocoupler upto the task:
http://www.vishay.com/docs/83684/sfh6720t.pdf
But a 300ns max propagation delay is pushing it. In order to get the speed i need, looks like i'll have to go with an isolated gate driver just to drive the bigger gate driver haha.
300ns is pushing it? Why do you need such short delays?

The Avago H312 gate drive optocoupler (the one I'm using) has a propogation delay of 500ns. The biggest timing concern I have is the propogation from the hall effect sensor through the overcurrent circuits back to the IGBT gate to turn it off if there's a problem. The hall effect sensors I'm using have a reaction time of 5us, which accounts of 75% of my total 6.7us delay from fault event to IGBT turn-off. According to the IGBT datasheets, I have a 10us window in which to react.

Is the DTC algorithm sensitive to ns-order delays?

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Post by Stiive » Mon, 20 Aug 2012, 23:52

BigMouse wrote: 300ns is pushing it? Why do you need such short delays? .... Is the DTC algorithm sensitive to ns-order delays?


Not DTC in general, but the constraints I've put on myself.

BigMouse wrote:The Avago H312 gate drive optocoupler (the one I'm using) has a propogation delay of 500ns. The biggest timing concern I have is the propogation from the hall effect sensor through the overcurrent circuits back to the IGBT gate to turn it off if there's a problem. The hall effect sensors I'm using have a reaction time of 5us, which accounts of 75% of my total 6.7us delay from fault event to IGBT turn-off. According to the IGBT datasheets, I have a 10us window in which to react.

Perhaps you should implement Vce saturation monitoring of the IGBT instead, or to compliment your current comparator circuit.
Last edited by Stiive on Mon, 20 Aug 2012, 13:54, edited 1 time in total.
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bga
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3-phase IM DTC controller build

Post by bga » Tue, 21 Aug 2012, 18:40

Yes, desat protection is needed.
The hall sensor approach will not be fast enough to save the transistors
from a short circuit.

I originally identified : AVAGO HCPL-316J as an appropriate gate driver.
This has desat event latching with indication and clear lines to controller as well as undervolts lockout.
2 Amp drive, booster bipolar txs may be needed for large IBGTs.
$12 at Farnell / element14 (Silicon = 14), stock in Australia

The hall current comparator is probably not necessary, as the speeds needed are in the processor's acquisition domain of circa 30khz sampling, so can be implemented in phase controller software.

IGBTs need to be held off at about -8 volts to ensure that transients
don't cause the device to trip (different to FETs)
It's not the end of the world, but I can see it from here.

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